CSU, Chico: Computer Science 380
(Computer Architecture)
Enlarge
|
Normal Size
|
Reduce
Slide
of 51 (Refresh off)
Ch 2: INSTRUCTION SET PRINCIPLES AND EXAMPLES
Moving on to Chapter 2 ...
Broad classes of processor architectures (by programming models)
Dream Machine: The best of all possible worlds?
Classifying architectures (stack, acc, gen-purpose register)
Illustrating architecture types (with assembly language)
Number of operands
Memory addressing
Endians and alignment
Addressing modes
Addressing modes visualization 1/2
Addressing modes visualization 2/2
Addressing modes usage
Displacement addressing mode: distribution detail
Popularity of immediate (or literal) addressing mode
Distribution of immediate values
Summary: Memory addressing
Type and size of operands
Operations in the instruction set
Instruction distribution (Top 10 for 80x86)
Special DSP/Media addressing modes
Special DSP/Media operands
Special DSP/Media operations
Control flow instructions
Control flow instructions distribution
Branch distances
Conditional branch options
Special DSP/Media control flow instructions
Procedure calling conventions
Comparison types
Summary: Control flow instructions
Encoding an instruction set
Variations in instruction encoding
Crosscutting issues: The role of compilers
Compiler passes
Compiler optimizations 1/2
Compiler optimizations 2/2
Effects of optimization
Compilers need architectures that ...
Summary: The role of compilers
Design principles used in MIPS
MIPS64 registers
MIPS addressing modles
MIPS Instruction layout
I-type instructions
R-type instructions
J-type instructions
MIPS dynamic instruction frequencies
MIPS M2000 versus VAX 8700 (based on SPEC 89)
Trimedia TM32 CPU
Fallacies and pitfalls
This
E-Slideshow
was prepared by
Dr. J
for
CSCI 380
(Last revised: Thu Jan 30 21:34:39 PDT 2003)