Catalog Description: The course introduces basic digital logic design techniques and integrates the topics of assembly language programming, computer organization, and computer design. Topics include the design of the arithmetic and logic unit (ALU), hardware multiplication and division, multiple clock cycle implementations, pipelined implementations, hazard detection and forwarding, design of a memory hierarchy, system busses and the design of a direct memory access (DMA) controller, cache consistency in multiprocessor systems, and implementation of a snooping cache. Formerly CSCI 171.
Course Objectives:
On completion of the class, a student should be able:
to understand the key concepts that are likely to be included in the design of any modern computer system
to understand and apply the basic metrics by which new and existing computer systems may be evaluated
to understand and evaluate the impact that peripherals, their interconnection, and underlying data operations have on the design of computer systems
to demonstrate the techniques needed to conduct a design of a computer
to examine different computer implementations and assess their strengths and weaknesses.
Course Outcomes:
Students shall be able to:
Design and simulate a combinational and sequential digital circuit circuits
Write assembly language programs to simulate the Multiply & Divide hardware of a computer.
Write assembly language programs to run on a pipelined architecture with delayed branches and delayed loads
Demonstrate how to build the Arithmetic and Logic Unit (ALU)
Encode and decode values in the IEEE 754 Floating Point Representation
Demonstrate different processor implementation techniques using data path diagrams and register transfer notation (Single Clock Cycle Implementation, Multiple Clock Cycle Implementation and Pipelined Implementation - Hazards - Forwarding - Delayed Branches
Describe different cache memory designs ( direct mapped, set associative, fully associative)
Describe different virtual memory designs including the TLB and register transfer notation (Single Clock Cycle Implementation, Multiple Clock Cycle Implementation and Pipelined Implementation - Hazards - Forwarding - Delayed Branches
Accreditation Category Content:
Topic
Percentage
Hours
Computer Organization and Architecture
100%
45
Relationship of Course to Program Objectives:
This course supports the achievement of the following program objectives:
An ability to analyze, design, develop and test computer-based systems with the ability to design and integrate both hardware and software components
An ability to apply knowledge of mathematics, science and engineering.
An ability to bring to bear knowledge of fundamental concepts, design principles, and knowledge of the operations of engineering building blocks for solving and engineering design problem.
College of Engineering, Computer
Science, & Construction Management
California State University, Chico
Chico, CA 95929-0003
530-898-5963 webmaster@ecst.csuchico.edu
